Rapidus株式会社 RECRUITING SITE

(設計技術統括部)Digital Chip Design Engineer (Standard Cell Development & DTCO)

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  • (設計技術統括部)Digital Chip Design Engineer (Standard Cell Development & DTCO)
職務内容
Rapidus is a leading innovator in cutting-edge digital chip design. We are looking for a talented and experienced Digital Chip Design Engineer to join our team, focusing on Standard Cell Development and Design Technology Co-Optimization (DTCO).

In this role, you will be instrumental in enabling high-performance and low-power digital chips for our next-generation products, by driving the convergence of library design and process technology. You will have the opportunity to work with state-of-the-art technology in a global environment, actively contributing to our advanced product development.

Key Responsibilities:
- Design, evaluate, and optimize standard cell libraries for advanced technology nodes.
- Plan and execute DTCO (Design Technology Co-Optimization) activities, strengthening the collaboration between circuit design and process technology to achieve optimal PPA (Power, Performance, Area) targets.
- Develop and improve custom layout, characterization, and verification flows.
- Design with a keen understanding of design rules, process variations, and reliability requirements.
- Collaborate closely with design teams, process and device development teams, and EDA teams.
- Evaluate and introduce new design methodologies and tools to meet PPA goals.
- Engage in technical discussions and collaborations with IP vendors and EDA venders.
- Document and maintain design data.
応募資格/応募条件
Required Skills & Experience
- Bachelor's degree or higher in Electrical Engineering, Electronics Engineering, Physics, or a related field.
- 5+ years of hands-on experience in digital IC design, specifically in custom cell, standard cell, or memory design.
- Proven design experience with advanced CMOS technology nodes (e.g., 7nm, 5nm, 3nm).
- In-depth knowledge and experience in standard cell library characterization and verification.
- Strong understanding of PDK (Process Design Kit) and design rules.
- Proficiency with EDA tools such as Cadence Virtuoso, Synopsys Custom Compiler, HSPICE, Spectre, PrimeTime, and Liberate
- Understanding of DTCO concepts and a strong willingness to contribute to related activities.
- Experience with scripting languages for automation (e.g., Python, Perl, Tcl).
- Excellent analytical and problem-solving skills.
- Business-level English proficiency, capable of technical discussions with international engineers.
- English communication skills.


Preferred Skills & Experience
- Practical experience or significant contributions to DTCO activities.
- Design experience with FinFET or GAAFET technologies.
- Knowledge of physical design (floor planning, place & route).
- Understanding of reliability issues (IR drop, EM, ESD, etc.).
- Experience applying machine learning or AI to design optimization.
- Team management or project leadership experience.

Desired Personality Traits
- Highly motivated to continuously learn new technologies and trends.
- Ability to approach and solve complex technical challenges logically.
- Strong team player who can collaborate effectively with team members from diverse backgrounds to achieve common goals.
- Detail-oriented with a commitment to delivering high-quality results.
- Highly responsible and able to drive tasks autonomously.
雇用形態
正社員
【試用期間】 3ヶ月(※労働条件は本採用と同じです)
給与
スキル・ご経験によって応相談
昇給
勤務地
Albany, New York, Santa Clara, California, Tokyo, Japan, or Chitose, Japan
勤務時間
フレックスタイム制(フルフレックス)
※1日の標準労働時間 7時間30分
※標準労働時間帯 9:00~17:30(休憩60分)東京
※標準労働時間帯 8:30~17:00(休憩60分)千歳
休日休暇
・完全週休2日制(土・日)、国民の祝日
・年次有給休暇(20日 入社初年度は入社した月に応じる日数の年次有給休暇を付与する)
・創立記念日(8/10)
・年末年始休暇
・慶弔休暇
・産前・産後休暇
・育児休暇
・介護休暇
※年間休日 128日
加入保険
・健康保険
・厚生年金
・雇用保険
・労災保険
待遇・手当
・通勤手当
・残業手当
各種制度
OJTでの研修教育を想定
応募書類
履歴書、職務経歴書
その他
屋内完全禁煙により受動喫煙対策を実施
選考プロセス
以下はモデルケースですので、面接回数など若干変更する場合もあります。
  1. STEP 1Webエントリー

    エントリーフォームよりご応募ください。

  2. STEP 2書類選考

    いただいた情報をもとに選考を行います。
    ※合否に関わらず選考結果をご連絡します。

  3. STEP 3一次面接

    オンラインにて実施します。

  4. STEP 4最終面接

    対面にて実施します。確認事項あり。
    ※ポジションによっては、面接回数が2回とは限りません。

  5. STEP 5内定

    ※応募の秘密は厳守いたします。
    ※本情報は選考の目的以外には一切使用いたしません。
    ※書類審査~内定まで最短で2~3週間程度かかります。

お問い合わせ
Rapidus株式会社
東京都千代田区麹町4丁目1番地 麹町ダイヤモンドビル 11階
採用担当
ENTRY/応募

以下からご応募ください。