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UPDATE: 2024.12.11

Rapidus Collaborates with Cadence on Leading-Edge 2nm Semiconductor Solutions for AI and HPC ApplicationsCollaboration spans interface and memory IP utilizing 2nm gate-all-around, BSPDN technology and AI-driven reference flows to facilitate the development of advanced, energy-efficient chips

UPDATE: 2024.12.11

Rapidus Collaborates with Synopsys to Shorten Semiconductor Design Cycles

UPDATE: 2024.12.10

IBM Research and Rapidus co-authored paper accepted at IEDM 2024

UPDATE: 2024.10.04

Statement Regarding Rapidus Funding Rumors

UPDATE: 2024.10.03

Rapidus establishes state-of-the-art back-end semiconductor manufacturing process research-and-development centerRapidus Chiplet Solutions, a new R&D facility and clean room, will be located on Seiko Epson’s Chitose campus

UPDATE: 2024.07.19

Rapidus Recognized on EE Times’ “Silicon 100” for Second Consecutive Year

UPDATE: 2024.06.05

Rapidus Signs Comprehensive Collaboration Agreement with Hokkaido UniversityGoal is to enhance Japan’s scientific and technological capabilities, and develop human resources for the semiconductor industry

UPDATE: 2024.06.04

Rapidus and IBM Expand Collaboration to Chiplet Packaging Technology for 2nm-Generation Semiconductors
Agreement builds on existing collaboration between the two companies for the joint development of 2nm node technology

UPDATE: 2024.05.15

Rapidus and Esperanto Technologies
Sign Memorandum of CooperationPromote development and manufacture of more energy-efficient semiconductors for artificial intelligence and other high-performance datacenter applications

UPDATE: 2024.04.12

Rapidus announces U.S. subsidiary and opens Silicon Valley office; names Henri Richard as GM and president of Rapidus Design Solutions